Researchers at the Indian Institute of Technology Guwahati have made a notable advancement in Electronic Design Automation-EDA by developing an innovative machine learning framework called ‘LEAP.’ This pioneering solution is set to revolutionise the design process of Integrated Circuits (ICs), a cornerstone of the $600 billion semiconductor industry that fuels modern electronic devices.
IIT Guwahati stated the creation of ICs heavily relies on EDA software, which converts high-level designs into a manufacturing-ready format known as Graphic Design System (GDS). The design process of ICs, however, involves navigating complex challenges that traditional heuristic methods — quick problem-solving techniques that prioritise acceptable solutions over perfect ones — often struggle to overcome. While these methods can balance design quality and runtime, they frequently result in suboptimal outcomes.
To address these limitations, Prof Chandan Karfa, Associate Professor, and Dr Sukanta Bhattacharjee, Assistant Professor, both from the Department of Computer Science and Engineering at IIT Guwahati, collaborated with BTech students Chandrabhushan Reddy Chigarapally and Harshwardhan Nitin Bhakkad. They, along with Dr Animesh Basak Chowdhury from New York University, USA, have harnessed machine learning to enhance efficiency in IC design through the LEAP framework.
The LEAP framework significantly improves the technology mapping process within EDA by intelligently identifying and prioritising the most promising design configurations. This approach reduces the number of configurations the mapping tool must evaluate by over 50 per cent, streamlining the design process.
Discussing the breakthrough, Prof Chandan Karfa stated, “Our framework not only accelerates the mapping process but also enhances the performance of the circuits. We have managed to cut the runtime of the EDA tool by 50 per cent and achieve a 2 per cent reduction in clock period without increasing the circuit area, marking a significant advancement in electronic design automation.”
LEAP estimates delays for various configurations and focuses on the top ten options for each node in the design, compared to traditional methods that typically assess around 250 configurations. This targeted approach enhances workflow efficiency and overall effectiveness.
In extensive testing on 21 different designs, LEAP demonstrated a 50 per cent improvement in runtime while reducing the number of configurations checked by over 51 per cent. The framework achieved similar performance results as exhaustive mapping methods while using 63 per cent fewer configurations, notably improving the runtime of the open-source ABC EDA tool.
This research has profound implications for the semiconductor industry, which is vital for developing electronic devices such as smartphones and computers. By refining the IC design process through LEAP, researchers can reduce design time and enhance device performance. This leads to faster, more efficient electronic devices with lower energy consumption, benefiting consumers and driving innovation across various technology sectors.
The promising results of this research have been published in the ACM/IEEE International Conference on Computer-Aided Design (ICCAD 2024).
